1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, which includes a step of performing plasma treatment to an insulating film or a semiconductor layer.
2. Description of the Related Art
In recent years, techniques of forming a field-effect transistor (which includes a MOS transistor, a thin film transistor, an insulated-gate transistor, or the like; hereinafter also simply referred to as a “transistor”) by using a semiconductor thin film (with a thickness of about several nanometers to several hundred nanometers) formed over a substrate having an insulating surface such as glass, have been attracting attention. Transistors are widely applied to integrated circuits, liquid crystal display devices, and the like. Further, development of transistors with finer structures is demanded in accordance with the need for higher performance of electronic devices.
It is order to achieve downsizing of transistors, it is required to form an insulating layer such as a gate insulating layer with a thin shape, as well as conductive layers such as a gate electrode and source and drain wires. A gate insulating layer of a transistor or the like is generally manufactured by depositing a thin film by plasma CVD, sputtering, or the like (see Patent Document 1, for example).
As an application field of a transistor, a display technology called an active matrix display has been known. In such an active matrix display device, a transistor is provided in each pixel arranged in matrix, and the switching operation of the transistor is utilized for driving a display medium such a liquid crystal or an electroluminescence element. In an active matrix display, development for expanding an effective pixel region in each pixel (as for a transmissive liquid crystal display device, it means a ratio of a light-transmissive area to one pixel, while as for a display device using an electroluminescence element, it means a ratio of a light-emissive area to one pixel) has been advanced. In order to increase the area of an effective pixel region, it is required to minimize the area occupied by a transistor disposed in each pixel as much as possible. In addition, development of forming a driver circuit and a pixel portion over a common substrate has also been advanced in order to reduce the manufacturing cost. Among them, a transistor using a polycrystalline silicon film is known for its high-speed operation since it has a higher electron field-effect mobility than a transistor using a hydrogenated amorphous silicon film.
In the case of forming a driver circuit and a pixel portion over a common substrate by using thin film transistors, an area occupied by a region other than a pixel region (called a frame region) tends to be larger as compared to the case of mounting the driver circuit by a surface mounting technique such as COG (Chip On Glass), or TAB (Tape Automated Bonding) by which a driver IC is mounted on a wiring board in a film form. In order to reduce the area of the frame region, it is also required to reduce a circuit scale of the driver circuit. As for the pixel configuration also, various attempts have been made, for example by combining a switching transistor with a memory element such as a static RAM (SRAM) in one pixel.
In the foregoing background, such a technique has been known that a photomask or a leticle including an auxiliary pattern which is formed of a diffraction grating pattern or a semi-transmissive film having a function of reducing the light intensity is applied to a photolithography process for forming a gate electrode (see Patent Document 2, for example). In addition, such a technique has also been known that a gate electrode is formed to have a two-layer structure with different conductive materials with the condition that the first layer is wider than the second layer, so that doping is performed to a semiconductor layer through a part of the first layer (see Patent Document 3, for example).    [Patent Document 1] Japanese Patent Laid-Open No. 2001-135824    [Patent Document 2] Japanese Patent Laid-Open No. 2002-151523    [Patent Document 3] Japanese Patent Laid-Open No. 2002-203862
However, an insulating film formed by CVD or sputtering to have a thickness of several nanometers has defects inside the film. For example, in the case of using an insulating film formed by plasma CVD as a gate insulating film, there is a possibility of causing a leakage current or a short between a semiconductor layer and a gate electrode. Further, while a dense insulating film can be formed by oxidizing the surface of a semiconductor film, a cost-effective glass substrate or the like having low heat resistance is practically used for manufacturing transistors; therefore, thermal oxidation is difficult to be performed.